FPGA Cluster Accelerated Boolean Synthesis |
|---|
C. Pedraza, J. Castillo, P. Huerta, J. Cano, JL Bosque, JI Martínez
Proceedings of the 2009 Int. Conference on Computational and Mathematical Methods in Science and Engineering. Vol 3, pp 806 – 816
2009
Ambito:
WP3: ARQUITECTURA DE LOS FUTUROS SUPERCOMPUTADORES |
Copyright 2009 - 2013 © SyeC-Consolider.es Todos los derechos reservados. Aviso Legal
